Open Access Open Access  Restricted Access Subscription or Fee Access

Simulation and Design of AES Algorithm-Encryption using VHDL

Kavita Nehra

Abstract


If the confidentiality of the information is extremely valuable, the demand for protection increases. Security is essential to prevent unauthorized disclosure or data modification. Because of the rapid advancement of technology, a large amount of multimedia data is generated and transmitted today, leaving our own data vulnerable to being edited, modified, and duplicated. As a result of their ease of copying and distribution, digital documents are vulnerable to a plethora of threats. Cryptography is a secret writing art that authenticates data and important messages while also protecting systems from legitimate attacks. The Advanced Encryption Standard (AES) is one of the most powerful data encryption systems available. It contains encryption and encryption procedures, each of which is associated with a key that must be kept confidential. In this paper, the Xilinx ISE 13.1 project navigator software is used for AES algorithm synthesis and simulation

Full Text:

PDF

References


Nimmi Gupta “Implementation of Optimized DES Encryption Algorithm upto 4 Round on Spartan 3”, International Journal of Computer Technology and Electronics Engineering, Volume 2, Issue 1, Jan 2012.

Mital Maheta “Design and simulation of AES algorithm Encryption using VHDL”, International Journal of Engineering Development and Research Volume 2, Issue 1, 2014.

Hrushikesh S. Deshpande, Kailash J. Karande, Altaaf O. Mulani “Efficient Implementation of AES Algorithm on FPGA”, Progress In Science in Engineering Research Journal, 2014, ISSN 2347-6680 Pp 170–175.

Ashwini R. Tonde and Akshay P. Dhande “Implementation of Advanced Encryption Standard (AES) Algorithm Based on FPGA”, International Journal of Current Engineering and Technology, Volume 4, No.2, April 2014.

Hassan Anwar, Masoud Daneshtalab, Masoumeh Ebrahimi, Juha Plosila, Hannu Tenhunen “FPGA Implementation of AES-based Crypto Processor”, IEEE 2013.

Abhijith. P.S, Mallika Srivastava, Aparna Mishra, Manish Goswami, B.R.Singh “High Performance Hardware Implementation of AES Using Minimal Resources”, International Conference on Intelligent Systems and Signal Processing (ISSP), IEEE 2013.

K. Soumya, G. Shyam Kishore “Design and Implementation of Rijndael Encryption Algorithm Based on FPGA”, International Journal of Computer Science and Mobile Computing, Vol. 2, Issue. 9, September 2013, Pp 120–127.

Manjesh.K.N, RK Karunavathi “Secured High throughput implementation of AES Algorithm”, International Journal of Advanced Research in Computer Science and Software Engineering 3 (5), May-2013, Pp. 1193–1198.

Bin Liu, Bevan M. Bass, “Parallel AES Encryption Engines for Many-Core Processor Arrays”, IEEE Transactions On Computers, Vol. 62, No. 3 March 2013.

Ohyoung Song, Jiho Kim “Compact Design of the Advanced Encryption Standard Algorithm for IEEE 802.15.4 Devices”, Journal of Electrical Engineering & Technology, Vol. 6, No. 3, Pp 418–422, 2011.




DOI: https://doi.org/10.37591/jscrs.v7i1.1596

Refbacks

  • There are currently no refbacks.