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Power and Body-Bias Optimization for FD-SOI Systems-Via Simulations and Algorithms
Abstract
The field of Integrated Circuits is very vast from digital to analog circuits dealing with
various types of digital circuits our paper deals with the CMOS digital circuits power
optimization. The paper deals auto-characterizing different FD-SOI circuits with certain
machine learning techniques verifying their outputs along with managing power losses and
body bias voltages in different temperature conditions the machine learning techniques help
optimize power losses by varying body bias voltages according to the functional loads.
Keywords: CMOS, digital circuit, FD-SOI (Fully Insulated Silicon on Insulator), FinFet
Field effect transistors, voltage
References
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DOI: https://doi.org/10.37628/ijepst.v6i1.1309
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